Cronologic Ndigo Crate Betriebsanweisung PDF herunterladen (Seite 11)

6.4.3. This feature is especially useful for highly asymmetric signals, such as pulses from TOF

+0.5V

analog_offset[i] = 0V

-0.5 V

+0.5V

analog_offset[i] = -0.43V

-0.5 V

0.43V

Figure 2.6: Asymmetric signal shifted to increase dynamic range

spectrometers or LIDAR systems. By shifting the DC baseline to one end of the ADC range,

the input range can be used fully, providing the maximum dynamic range.

2.2.3 Digital Inputs

There are two digital inputs on the front slot cover called TRIGGER and GATE.

Both inputs provide a digital input signal routed to the trigger matrix. These signals can

be used to trigger any of the trigger state machines and gating blocks. The inputs are AC

coupled. The DC oﬀset is conﬁgurable via the parameters analog oﬀset[4] for TRIGGER and

analog oﬀset[5] for GATE in the conﬁguration structure. See section 3.4.1 for a deﬁnition of the

conﬁguration structure.

TRIGGER

analog_offset[4]

TDC

Figure 2.7: TRIGGER and GATE are AC coupled inputs with programmable threshold. (Only

TRIGGER shown)

For the digital signals the oﬀset directly sets the discrimination threshold at which edges are

detected. To support both negative and positive pulses the valid range is -1.25V to +1.25V.

To prevent inter symbol interference caused by the AC coupling, the distance between adjacent

pulses should be much longer than the width of each of the pulses.

The FPGA input logic is shown in Figure 2.13 on page 12.

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Cronologic Ndigo Crate Betriebsanweisung Seite 11