Cronologic Ndigo Crate Betriebsanweisung PDF herunterladen (Seite 31)

ndigo bool t is slave

Data acquisition of this board is controlled by the master board.

int sync period

Period of the multicard sync pulse. Ignored for single board setups. Should be set to 4 if only

Ndigo5G and Ndigo250M boards are present in the system. If other boards are synchronized

the correct value is the lowest common denominator of the value of all boards.

int sync delay

Fine tap delay for incoming sync signals. Ignored for single board setups.

int sync delay master

Fine tap delay for sync signals. Ignored for single board setups.

ndigo bool t force window calibration

If true/1, a valid data window is automatically detected at initialization. Default value is false/0:

values from ﬂash memory are used in order to set the data window to correct position.

ndigo bool t hptdc sync enabled

Must be set to false.

int64 buﬀer size[8]

The minimum size for each of the DMA buﬀers. The driver will allocate a multiple of the system

page size (usually 4096 bytes). The minimum buﬀer size is four pages. If set to 0 the default size

of 16MByte is used. Ndigo250M-14 uses buﬀer size[0] to buﬀer size[NDIGO250M DMA COUNT-

1].

int buﬀer type

Must be set to NDIGO BUFFER ALLOCATE.

int64 buﬀer address

Ignored. Might be used for future buﬀer types.

int variant

Set to 0. Can be used to activate future device variants such as diﬀerent base frequencies.

int device type

Initialized by ndigo get default init parameters(). Must be left unchanged.

#deﬁne CRONO DEVICE HPTDC 0

#deﬁne CRONO DEVICE NDIGO5G 1

#deﬁne CRONO DEVICE NDIGO250M 2

int dma read delay

Initialized by ndigo get default init parameters(). The write pointer updated is delay by this

number of 4n clock periods to hide race conditions between software and DMA.

cronologic GmbH & Co. KG 27 Ndigo250M-14 User Guide

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Cronologic Ndigo Crate Betriebsanweisung Seite 31